Low Power Flip-Flop Design Using Tri-State Inverter Logic
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Figure 1 from Tri-state buffer/bus driver circuits in MOS current-mode logic | Semantic Scholar
Tristate Buffers - YouTube
SOLVED: 2. Consider a tri-state buffer with an active-low enable. (So the output of the buffer is enabled when the enable signal is low, and is in tri -state when the enable signal